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» Static timing analysis for modeling QoS in networks-on-chip
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DATE
2009
IEEE
120views Hardware» more  DATE 2009»
14 years 2 months ago
Overcoming limitations of the SystemC data introspection
—Today verification, testing and debugging of SystemC models can be applied at an early stage in the design process. To support these techniques gaining required information of ...
Christian Genz, Rolf Drechsler
ISQED
2010
IEEE
177views Hardware» more  ISQED 2010»
14 years 2 months ago
Multi-corner, energy-delay optimized, NBTI-aware flip-flop design
With the CMOS transistors being scaled to sub 45nm and lower, Negative Bias Temperature Instability (NBTI) has become a major concern due to its impact on PMOS transistor aging pr...
Hamed Abrishami, Safar Hatami, Massoud Pedram
WSC
1997
13 years 9 months ago
Computational Experience with the Batch Means Method
This article discusses implementation issues for the LBATCH and ABATCH batch means procedures of Fishman and Yarberry (1997). Theses procedures dynamically increase the batch size...
Christos Alexopoulos, George S. Fishman, Andrew F....
JUCS
2008
155views more  JUCS 2008»
13 years 7 months ago
Dynamic Bandwidth Pricing: Provision Cost, Market Size, Effective Bandwidths and Price Games
Abstract: Nowadays, in the markets of broadband access services, traditional contracts are of "static" type. Customers buy the right to use a specific amount of resources...
Sergios Soursos, Costas Courcoubetis, Richard R. W...
PLDI
1997
ACM
13 years 11 months ago
Incremental Analysis of real Programming Languages
A major research goal for compilers and environments is the automatic derivation of tools from formal specifications. However, the formal model of the language is often inadequat...
Tim A. Wagner, Susan L. Graham