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» Statistical Approach to NoC Design
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DATE
2005
IEEE
128views Hardware» more  DATE 2005»
14 years 1 months ago
Design of a Virtual Component Neutral Network-on-Chip Transaction Layer
Research studies have demonstrated the feasibility and advantages of Network-on-Chip (NoC) over traditional bus-based architectures but have not focused on compatibility communica...
Philippe Martin
DAC
2007
ACM
14 years 8 months ago
The Case for Low-Power Photonic Networks on Chip
Packet-switched networks on chip (NoC) have been advocated as a natural communication mechanism among the processing cores in future chip multiprocessors (CMP). However, electroni...
Assaf Shacham, Keren Bergman, Luca P. Carloni
DATE
2007
IEEE
173views Hardware» more  DATE 2007»
14 years 1 months ago
Analytical router modeling for networks-on-chip performance analysis
Networks-on-Chip (NoCs) have recently emerged as a scalable alternative to classical bus and point-to-point architectures. To date, performance evaluation of NoC designs is largel...
Ümit Y. Ogras, Radu Marculescu
ICCD
2006
IEEE
182views Hardware» more  ICCD 2006»
14 years 4 months ago
A performance and power analysis of WK-Recursive and Mesh Networks for Network-on-Chips
—Network-on-Chip (NoC) has been proposed as an attractive alternative to traditional dedicated wires to achieve high performance and modularity. Power efficiency is one of the mo...
Dara Rahmati, Abbas Eslami Kiasari, Shaahin Hessab...
BWCCA
2010
13 years 2 months ago
Advanced Design Issues for OASIS Network-on-Chip Architecture
Network-on-Chip (NoC) architectures provide a good way of realizing efficient interconnections and largely alleviate the limitations of bus-based solutions. NoC has emerged as a so...
Kenichi Mori, Adam Esch, Abderazek Ben Abdallah, K...