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» Statistical Modeling for Circuit Simulation
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DATE
2005
IEEE
143views Hardware» more  DATE 2005»
13 years 12 months ago
Statistical Modeling of Pipeline Delay and Design of Pipeline under Process Variation to Enhance Yield in sub-100nm Technologies
Operating frequency of a pipelined circuit is determined by the delay of the slowest pipeline stage. However, under statistical delay variation in sub-100nm technology regime, the...
Animesh Datta, Swarup Bhunia, Saibal Mukhopadhyay,...
DAC
2005
ACM
14 years 11 months ago
Correlation-preserved non-gaussian statistical timing analysis with quadratic timing model
Recent study shows that the existing first order canonical timing model is not sufficient to represent the dependency of the gate delay on the variation sources when processing an...
Lizheng Zhang, Weijen Chen, Yuhen Hu, John A. Gubn...
BMAS
2000
IEEE
14 years 2 months ago
Event-Driven Electrothermal Modeling of Mixed-Signal Circuits
This paper describes a novel modeling methodology for electrothermal effects in large mixed-signal circuits. It is accomplished by developing analog event-driven electrothermal an...
Xiaoling Huang, H. Alan Mantooth
FDL
2006
IEEE
14 years 4 months ago
Randomized Simulation of Hybrid Systems For Circuit Validation
Abstract. The paper proposes a simulation-based method for validating analog and mixed-signal circuits, using the hybrid systems methodology. This method builds upon RRT (Rapidly-e...
Thao Dang, Tarik Nahhal
ISLPED
1996
ACM
78views Hardware» more  ISLPED 1996»
14 years 2 months ago
Gate-level current waveform simulation of CMOS integrated circuits
We present a new gate-level approach to current simulation. We use a symbolic model of current pulses that takes accurately into account the dependence on the switching conditions...
Alessandro Bogliolo, Luca Benini, Giovanni De Mich...