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» Statistical Modeling for Circuit Simulation
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126
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SPAA
2005
ACM
15 years 8 months ago
Parallelizing time with polynomial circuits
We study the problem of asymptotically reducing the runtime of serial computations with circuits of polynomial size. We give an algorithmic size-depth tradeoff for parallelizing ...
Ryan Williams
132
Voted
ASPDAC
2010
ACM
165views Hardware» more  ASPDAC 2010»
15 years 18 days ago
Dynamic power estimation for deep submicron circuits with process variation
- Dynamic power consumption in CMOS circuits is usually estimated based on the number of signal transitions. However, when considering glitches, this is not accurate because narrow...
Quang Dinh, Deming Chen, Martin D. F. Wong
132
Voted
WSC
2000
15 years 3 months ago
Simulation output analysis via dynamic batch means
This paper is focused on estimating the quality of the sample mean from a steady-state simulation experiment with consideration of computational efficiency, memory requirement, an...
Yingchieh Yeh, Bruce W. Schmeiser
WSC
2000
15 years 3 months ago
Modeling reality with simulation games for a cooperative learning
In this work we want to show the importance of visualization, interfaces and re-design techniques through 3D modeling, animations and VRML in the developing of the simulation game...
João Rafael Galvão, Paulo Garcia Mar...
140
Voted
DAC
2003
ACM
15 years 7 months ago
Realizable RLCK circuit crunching
Reduction of an extracted netlist is an important pre-processing step for techniques such as model order reduction in the design and analysis of VLSI circuits. This paper describe...
Chirayu S. Amin, Masud H. Chowdhury, Yehea I. Isma...