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» Statistical Power Estimation for FPGA
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DAC
2010
ACM
13 years 7 months ago
Adaptive and autonomous thermal tracking for high performance computing systems
Many DTM schemes rely heavily on the accurate knowledge of the chip's dynamic thermal state to make optimal performance/ temperature trade-off decisions. This information is ...
Yufu Zhang, Ankur Srivastava
FPL
2009
Springer
149views Hardware» more  FPL 2009»
14 years 1 days ago
Reconfigurable fault tolerance: A framework for environmentally adaptive fault mitigation in space
Commercial SRAM-based FPGAs have the potential to provide aerospace applications with the necessary performance to meet next-generation mission requirements. However, the suscepti...
Adam Jacobs, Alan D. George, Grzegorz Cieslewski
ISLPED
2005
ACM
108views Hardware» more  ISLPED 2005»
14 years 29 days ago
Replacing global wires with an on-chip network: a power analysis
This paper explores the power implications of replacing global chip wires with an on-chip network. We optimize network links by varying repeater spacing, link pipelining, and volt...
Seongmoo Heo, Krste Asanovic
ICCAD
2002
IEEE
143views Hardware» more  ICCAD 2002»
14 years 4 months ago
A Markov chain sequence generator for power macromodeling
In macromodeling-based power estimation, circuit macromodels are created from simulations of synthetic input vector sequences. Fast generation of these sequences with all possible...
Xun Liu, Marios C. Papaefthymiou
FPL
2008
Springer
207views Hardware» more  FPL 2008»
13 years 9 months ago
Bitstream compression techniques for Virtex 4 FPGAs
This paper examines the opportunity of using compression for accelerating the (re)configuration of FPGA devices, focusing on the choice of compression algorithms, and their hardwa...
Radu Stefan, Sorin Dan Cotofana