1147 search results - page 12 / 230 » Statistical Timing Analysis Using Bounds |
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
Statistical Static Timing Analysis has received wide attention recently and emerged as a viable technique for manufacturability analysis. To be useful, however, it is important th...
ICCAD
2001
IEEE
14 years 4 months ago
2001
IEEE
In this paper, we study the propagation of slew dependent bounding signals and the corresponding slew problem in static timing analysis. The selection of slew from the latest arri...
ICCAD
2005
IEEE
14 years 4 months ago
2005
IEEE
— Process variations cause significant timing uncertainty and yield degradation in deep sub-micron technologies. A solution to counter timing uncertainty is post-silicon clock t...
GLVLSI
2006
IEEE
14 years 1 months ago
2006
IEEE
Process technology and environment-induced variability of gates and wires in VLSI circuits make timing analyses of such circuits a challenging task. Process variation can have a s...
FPGA
2010
ACM
14 years 4 months ago
2010
ACM
Deep submicron processes have allowed FPGAs to grow in complexity and speed. However, such technology scaling has caused FPGAs to become more susceptible to the effects of process...