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» Storage coding for wear leveling in flash memories
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DATE
2006
IEEE
82views Hardware» more  DATE 2006»
14 years 1 months ago
Dynamic code overlay of SDF-modeled programs on low-end embedded systems
In this paper we propose a dynamic code overlay technique of synchronous data-flow (SDF) –modeled program for low-end embedded systems which lack MMUsupport. With this technique...
Hae-woo Park, Kyoungjoo Oh, Soyoung Park, Myoung-m...
ISCA
2010
IEEE
284views Hardware» more  ISCA 2010»
14 years 19 days ago
Security refresh: prevent malicious wear-out and increase durability for phase-change memory with dynamically randomized address
Phase change memory (PCM) is an emerging memory technology for future computing systems. Compared to other non-volatile memory alternatives, PCM is more matured to production, and...
Nak Hee Seong, Dong Hyuk Woo, Hsien-Hsin S. Lee
TIT
2010
170views Education» more  TIT 2010»
13 years 2 months ago
Correcting charge-constrained errors in the rank-modulation scheme
We investigate error-correcting codes for a the rank-modulation scheme with an application to flash memory devices. In this scheme, a set of n cells stores information in the permu...
Anxiao Jiang, Moshe Schwartz, Jehoshua Bruck
ISCA
2009
IEEE
148views Hardware» more  ISCA 2009»
14 years 2 months ago
Memory mapped ECC: low-cost error protection for last level caches
This paper presents a novel technique, Memory Mapped ECC, which reduces the cost of providing error correction for SRAM caches. It is important to limit such overheads as processo...
Doe Hyun Yoon, Mattan Erez
PPOPP
2003
ACM
14 years 24 days ago
Factorization with morton-ordered quadtree matrices for memory re-use and parallelism
Quadtree matrices using Morton-order storage provide natural blocking on every level of a memory hierarchy. Writing the natural recursive algorithms to take advantage of this bloc...
Jeremy D. Frens, David S. Wise