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ASAP
2006
IEEE
130views Hardware» more  ASAP 2006»
14 years 1 months ago
Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...
Bo-Cheng Charles Lai, Patrick Schaumont, Wei Qin, ...
ISCAS
1999
IEEE
124views Hardware» more  ISCAS 1999»
13 years 11 months ago
On the robustness of vector set partitioning image coders to bit errors
A vector enhancement of Said and Pearlman's Set Partitioning in Hierarchical Trees (SPIHT) methodology, named VSPIHT, has recently been proposed for embedded wavelet image co...
D. Mukherjee, S. K. Mitra
ARC
2012
Springer
317views Hardware» more  ARC 2012»
12 years 3 months ago
A High Throughput FPGA-Based Implementation of the Lanczos Method for the Symmetric Extremal Eigenvalue Problem
Iterative numerical algorithms with high memory bandwidth requirements but medium-size data sets (matrix size ∼ a few 100s) are highly appropriate for FPGA acceleration. This pap...
Abid Rafique, Nachiket Kapre, George A. Constantin...
FCCM
2009
IEEE
165views VLSI» more  FCCM 2009»
14 years 2 months ago
Accelerating Quadrature Methods for Option Valuation
This paper presents an architecture for FPGA acceleration of quadrature methods used for pricing complex options, such as discrete barrier, Bermudan, and American options. The arc...
Anson H. T. Tse, David B. Thomas, Wayne Luk
3DPVT
2006
IEEE
240views Visualization» more  3DPVT 2006»
14 years 1 months ago
Global Depth from Epipolar Volumes--A General Framework for Reconstructing Non-Lambertian Surfaces
Using Epipolar Image Analysis in the context of the correspondence finding problem in depth reconstruction has several advantages. One is the elegant incorporation of prior knowl...
Timo Stich, Art Tevs, Marcus A. Magnor