Sciweavers

871 search results - page 109 / 175
» Streaming Reduction Circuit
Sort
View
DCC
2008
IEEE
14 years 10 months ago
An Approach to Graph and Netlist Compression
We introduce an EDIF netlist graph algorithm which is lossy with respect to the original byte stream but lossless in terms of the circuit information it contains based on a graph ...
Jeehong Yang, Serap A. Savari, Oskar Mencer
ISMVL
2007
IEEE
112views Hardware» more  ISMVL 2007»
14 years 4 months ago
Survey of Stochastic Computation on Factor Graphs
Stochastic computation is a new alternative approach for iterative computation on factor graphs. In this approach, the information is represented by the statistics of the bit stre...
Saeed Sharifi Tehrani, Shie Mannor, Warren J. Gros...
ICCD
1991
IEEE
65views Hardware» more  ICCD 1991»
14 years 1 months ago
Self-Timed Logic Using Current-Sensing Completion Detection (CSCD)
This article proposes a completion-detection method for efficiently implementing Boolean functions as self-timed logic structures. Current-Sensing Completion Detection, CSCD, allow...
Mark E. Dean, David L. Dill, Mark Horowitz
CORR
2010
Springer
92views Education» more  CORR 2010»
13 years 10 months ago
Design and Modeling Billing solution to Next Generation Networks
-------------------------------------------------------------------ABSTRACT----------------------------------------------------------------Next generation networks (NGN) services a...
Kamaljit I. Lakhtaria, N. N. Jani
ICCAD
2001
IEEE
97views Hardware» more  ICCAD 2001»
14 years 7 months ago
Addressing the Timing Closure Problem by Integrating Logic Optimization and Placement
Timing closure problems occur when timing estimates computed during logic synthesis do not match with timing estimates computed from the layout of the circuit. In such a situation...
Wilsin Gosti, Sunil P. Khatri, Alberto L. Sangiova...