Hardware description languages (HDLs) are used today to describe circuits at all levels. In large HDL programs, there is a need for source code reduction techniques to address a my...
Edmund M. Clarke, Masahiro Fujita, Sreeranga P. Ra...
This paper presents a methodology for production-time testing of (uncustomized) segmented channel eld programmable gate arrays (FPGAs) such as those manufactured by Actel [1]. Th...
Abstract--Promising approaches for efficient detection in multiple-input multiple-output (MIMO) wireless systems are based on sphere-decoding (SD). The conventional (and optimum) n...
Conventional scan design imposes considerable area and delay overhead by using larger scan
ip-
ops and additional scan wires without utilizing the functionality of the combinatio...
Chih-Chang Lin, Malgorzata Marek-Sadowska, Mike Ti...
We present a formal procedure for structure-preserving model reduction of linear second-order and Hamiltonian control problems that appear in a variety of physical contexts, e.g., ...