Cost-free scan: a low-overhead scan path design

Conventional scan design imposes considerable area and delay overhead by using larger scan ip- ops and additional scan wires without utilizing the functionality of the combinational logic. We propose a novel low-overhead scan design methodology, called cost-free scan, which exploits the controllability of primary inputs to establish scan paths through the combinational logic. The methodology aims at reducing scan overhead by (1) analyzing the circuit to determine all the cost-free scan ip- ops, and (2) selecting the best primary input vector to establish the maximum number of cost-free scan ip- ops on the scan chain. Signicant reduction in the scan overhead is achieved on ISCAS89 benchmarks, where in full scan environment, as many as 89% of the total ip- ops are found cost-free scannable, while in partial scan environment, reduction can be as high as 97% in scan ip- ops needed to break sequential loops.

• Type: Journal
• Year: 1998
• Where: TCAD
• Authors: Chih-Chang Lin, Malgorzata Marek-Sadowska, Mike Tien-Chien Lee, Kuang-Chien Chen
• Keywords: Cost-free Scan, Scan, Scan Design, TCAD 1998