871 search results - page 24 / 175 » Streaming Reduction Circuit |
ICCD
2006
IEEE
14 years 6 months ago
2006
IEEE
— Accurate estimation of worst-case crosstalk effects is critical for a realistic estimation of the worst-case behavior of deep sub-micron circuits. Crosstalk analysis models usu...
ISMVL
2010
IEEE
14 years 3 months ago
2010
IEEE
—Multiway Decision Graphs (MDGs) subsume Binary Decision Diagrams (BDDs) and extend them by a first-order formulae suitable for model checking of data path circuits. In this pap...
FPL
2004
Springer
14 years 3 months ago
2004
Springer
When designing SoCs, a unique opportunity exists to generate custom FPGA architectures that are specific to the application domain in which the device will be used. The inclusion o...
ICCAD
2001
IEEE
14 years 6 months ago
2001
IEEE
- This paper presents a spectrally-weighted balanced truncation technique for RLC interconnects, a technique needed when the interconnect circuit parameters change as a result of v...
DAC
1999
ACM
14 years 10 months ago
1999
ACM
We propose a method for power optimization that considers glitch reduction by gate sizing based on the statistical estimation of glitch transitions. Our method reduces not only th...