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117
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ISLPED
2007
ACM
97views Hardware» more  ISLPED 2007»
15 years 4 months ago
Detailed placement for leakage reduction using systematic through-pitch variation
We present a novel detailed placement technique that accounts for systematic through-pitch variations to reduce leakage. Leakage depends nearly exponentially on linewidth (gate le...
Andrew B. Kahng, Swamy Muddu, Puneet Sharma
172
Voted
TNN
2011
126views more  TNN 2011»
14 years 9 months ago
Video Time Encoding Machines
—We investigate architectures for time encoding and time decoding of visual stimuli such as natural and synthetic video streams (movies, animation). The architecture for time enc...
Aurel A. Lazar, Eftychios A. Pnevmatikakis
103
Voted
TC
1998
15 years 2 months ago
Optimal Zero-Aliasing Space Compaction of Test Responses
—Many built-in self-testing (BIST) schemes compress the test responses from a k-output circuit to q signature streams, where q << k, a process termed space compaction. The ...
Krishnendu Chakrabarty, Brian T. Murray, John P. H...
108
Voted
ICCAD
2006
IEEE
146views Hardware» more  ICCAD 2006»
15 years 8 months ago
Cost-aware synthesis of asynchronous circuits based on partial acknowledgement
Designing asynchronous circuits by reusing existing synchronous tools has become a promising solution to the problem of poor CAD support in asynchronous world. A straightforward w...
Yu Zhou, Danil Sokolov, Alexandre Yakovlev
116
Voted
ASPDAC
2009
ACM
117views Hardware» more  ASPDAC 2009»
15 years 9 months ago
Adaptive techniques for overcoming performance degradation due to aging in digital circuits
— Negative Bias Temperature Instability (NBTI) in PMOS transistors has become a major reliability concern in present-day digital circuit design. Further, with the recent usage of...
Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatneka...