871 search results - page 99 / 175 » Streaming Reduction Circuit |
ISQED
2006
IEEE
14 years 4 months ago
2006
IEEE
Probabilistic system simulations for analog circuits have traditionally been handled with Monte Carlo analysis. For a manufacturable design, fast and accurate simulations are nece...
ISQED
2006
IEEE
14 years 4 months ago
2006
IEEE
The continuing VLSI technology scaling leads to increasingly significant power supply fluctuations, which need to be modeled accurately in circuit design and verification. Meanwhi...
ASIACRYPT
2005
Springer
14 years 3 months ago
2005
Springer
We propose Gate Evaluation Secret Sharing (GESS) – a new kind of secret sharing, designed for use in secure function evaluation (SFE) with minimal interaction. The resulting simp...
ITC
2002
IEEE
14 years 3 months ago
2002
IEEE
1 This paper presents a test input data compression technique, which can be used to reduce input test data volume, test time, and the number of required tester channels. The techni...
ICCAD
2000
IEEE
14 years 2 months ago
2000
IEEE
In this paper, we propose a new approach for VLSI interconnect global routing that can optimize both congestion and delay, which are often competing objectives. Our approach provi...