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ISCA
2005
IEEE
181views Hardware» more  ISCA 2005»
14 years 1 months ago
Adaptive Mechanisms and Policies for Managing Cache Hierarchies in Chip Multiprocessors
With the ability to place large numbers of transistors on a single silicon chip, manufacturers have begun developing chip multiprocessors (CMPs) containing multiple processor core...
Evan Speight, Hazim Shafi, Lixin Zhang, Ramakrishn...
AADEBUG
2005
Springer
14 years 1 months ago
Automated bug isolation via program chipping
This paper introduces program chipping, a simple yet effective technique to isolate bugs. This technique automatically removes or chips away parts of a program so that the part t...
Chad D. Sterling, Ronald A. Olsson
COCO
2005
Springer
110views Algorithms» more  COCO 2005»
14 years 1 months ago
Prior Entanglement, Message Compression and Privacy in Quantum Communication
Consider a two-party quantum communication protocol for computing some function f : {0, 1}n × {0, 1}n → Z. We show that the first message of P can be compressed to O(k) classi...
Rahul Jain, Jaikumar Radhakrishnan, Pranab Sen
MIR
2004
ACM
109views Multimedia» more  MIR 2004»
14 years 27 days ago
A web-enabled video indexing system
Video parsing and indexing is an important early stage of contentbased video analysis. In this paper, we present a new web-enabled video indexing system that integrates Synchroniz...
Jian Zhou, Xiao-Ping Zhang
MICRO
2003
IEEE
96views Hardware» more  MICRO 2003»
14 years 22 days ago
Scalable Hardware Memory Disambiguation for High ILP Processors
This paper describes several methods for improving the scalability of memory disambiguation hardware for future high ILP processors. As the number of in-flight instructions grows...
Simha Sethumadhavan, Rajagopalan Desikan, Doug Bur...