20 search results - page 1 / 4 » Structural In-Field Diagnosis for Random Logic Circuits |
ETS
2011
IEEE
12 years 7 months ago
2011
IEEE
—In-field diagnosability of electronic components in larger systems such as automobiles becomes a necessity for both customers and system integrators. Traditionally, functional ...
TCAD
1998
13 years 7 months ago
1998
—A new approach to optimize multilevel logic circuits is introduced. Given a multilevel circuit, the synthesis method optimizes its area while simultaneously enhancing its random...
ICCAD
2009
IEEE
13 years 5 months ago
2009
IEEE
Current logic synthesis techniques are ineffective for arithmetic circuits. They perform poorly for XOR-dominated circuits, and those with a high fan-in dependency between inputs ...
GLVLSI
2007
IEEE
14 years 1 months ago
2007
IEEE
Regularly structured design techniques can combat complexity on a variety of fronts. We present the Structured and Tuned Array Generation (STAG) design methodology, which provides...
JSA
2000
13 years 7 months ago
2000
As the density of VLSI circuits increases it becomes attractive to integrate dedicated test logic on a chip. This Built-in Self-Test (BIST) approach not only offers economic benef...