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ECBS
2010
IEEE
209views Hardware» more  ECBS 2010»
13 years 12 months ago
Continuous Verification of Large Embedded Software Using SMT-Based Bounded Model Checking
The complexity of software in embedded systems has increased significantly over the last years so that software verification now plays an important role in ensuring the overall pr...
Lucas Cordeiro, Bernd Fischer 0002, João Ma...
CODES
2005
IEEE
14 years 1 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
ICSE
2000
IEEE-ACM
13 years 11 months ago
Verification of time partitioning in the DEOS scheduler kernel
This paper describes an experiment to use the Spin model checking system to support automated verification of time partitioning in the Honeywell DEOS real-time scheduling kernel. ...
John Penix, Willem Visser, Eric Engstrom, Aaron La...
FMICS
2006
Springer
13 years 11 months ago
SAT-Based Verification of LTL Formulas
Abstract. Bounded model checking (BMC) based on satisfiability testing (SAT) has been introduced as a complementary technique to BDDbased symbolic model checking of LTL properties ...
Wenhui Zhang
SEFM
2005
IEEE
14 years 1 months ago
From RT-LOTOS to Time Petri Nets New Foundations for a Verification Platform
The formal description technique RT-LOTOS has been selected as intermediate language to add formality to a real-time UML profile named TURTLE. For this sake, an RT-LOTOS verificat...
Tarek Sadani, Pierre de Saqui-Sannes, Jean-Pierre ...