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» Study of a Multilevel Approach to Partitioning for Parallel ...
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CHES
2009
Springer
150views Cryptology» more  CHES 2009»
14 years 2 months ago
A Design Flow and Evaluation Framework for DPA-Resistant Instruction Set Extensions
Power-based side channel attacks are a significant security risk, especially for embedded applications. To improve the security of such devices, protected logic styles have been p...
Francesco Regazzoni, Alessandro Cevrero, Fran&cced...
ISCA
2010
IEEE
199views Hardware» more  ISCA 2010»
14 years 7 days ago
A case for FAME: FPGA architecture model execution
Given the multicore microprocessor revolution, we argue that the architecture research community needs a dramatic increase in simulation capacity. We believe FPGA Architecture Mod...
Zhangxi Tan, Andrew Waterman, Henry Cook, Sarah Bi...
WSC
2007
13 years 9 months ago
Modeling and simulation for customer driven manufacturing system design and operations planning
Agility, speed and flexibility in production networks are required in today's global competition in the flat world. The accuracy of order date delivery promises is a key elem...
Juhani Heilala, Jari Montonen, Arttu Salmela, Pasi...
ASPLOS
2010
ACM
13 years 10 months ago
Butterfly analysis: adapting dataflow analysis to dynamic parallel monitoring
Online program monitoring is an effective technique for detecting bugs and security attacks in running applications. Extending these tools to monitor parallel programs is challeng...
Michelle L. Goodstein, Evangelos Vlachos, Shimin C...
PSB
2004
13 years 8 months ago
Multiplexing Schemes for Generic SNP Genotyping Assays
Association studies in populations relate genomic variation among individuals with medical condition. Key to these studies is the development of efficient and affordable genotypin...
Roded Sharan, Amir Ben-Dor, Zohar Yakhini