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ICCAD
2006
IEEE
114views Hardware» more  ICCAD 2006»
14 years 7 months ago
Studying a GALS FPGA architecture using a parameterized automatic design flow
ÊÓÙØ Ò Ð Ý× ÓÑ Ò Ø ÓØ Ö Ð Ý× Ò ÙÖÖ ÒØ È ¹ × Ò׺ Ï Ú ÔÖÓÔÓ× ÒÓÚ Ð ÐÓ ÐÐÝ ×ÝÒ ÖÓÒÓÙ× ÄÓ ÐÐÝ ËÝÒ ÖÓÒÓÙ× ´ ÄË...
Xin Jia, Ranga Vemuri
SASP
2008
IEEE
140views Hardware» more  SASP 2008»
14 years 5 months ago
An FPGA Design Space Exploration Tool for Matrix Inversion Architectures
— Matrix inversion is a common function found in many algorithms used in wireless communication systems. As FPGAs become an increasingly attractive platform for wireless communic...
Ali Irturk, Bridget Benson, Shahnam Mirzaei, Ryan ...
FPGA
2005
ACM
215views FPGA» more  FPGA 2005»
14 years 4 months ago
Design, layout and verification of an FPGA using automated tools
Creating a new FPGA is a challenging undertaking because of the significant effort that must be spent on circuit design, layout and verification. It currently takes approximately ...
Ian Kuon, Aaron Egier, Jonathan Rose
FPGA
2003
ACM
137views FPGA» more  FPGA 2003»
14 years 4 months ago
Customized regular channel design in FPGAs
FPGAs are one of the essential components in platform-based embedded systems. Such systems are customized and applied only to a limited set of applications. Also some applications...
Elaheh Bozorgzadeh, Majid Sarrafzadeh
FPGA
2003
ACM
120views FPGA» more  FPGA 2003»
14 years 4 months ago
Architecture evaluation for power-efficient FPGAs
This paper presents a flexible FPGA architecture evaluation framework, named fpgaEVA-LP, for power efficiency analysis of LUT-based FPGA architectures. Our work has several contri...
Fei Li, Deming Chen, Lei He, Jason Cong