198 search results - page 14 / 40 » Supporting Cache Coherence in Heterogeneous Multiprocessor S... |
PPOPP
1993
ACM
13 years 11 months ago
1993
ACM
This paper discusses some of the issues involved in implementing a shared-address space programming model on large-scale, distributed-memory multiprocessors. While such a programm...
MICRO
2009
IEEE
14 years 2 months ago
2009
IEEE
Hardware support for dynamic analysis can minimize the performance overhead of useful applications such as security checks, debugging, and profiling. To eliminate implementation ...
ISCA
2002
IEEE
14 years 17 days ago
2002
IEEE
We develop an availability solution, called SafetyNet, that uses a unified, lightweight checkpoint/recovery mechanism to support multiple long-latency fault detection schemes. At...
CF
2006
ACM
14 years 1 months ago
2006
ACM
In a multi-programmed computing environment, threads of execution exhibit different runtime characteristics and hardware resource requirements. Not only do the behaviors of distin...
ISPASS
2007
IEEE
14 years 1 months ago
2007
IEEE
Address re-mapping techniques in so-called active memory systems have been shown to dramatically increase the performance of applications with poor cache and/or communication beha...