121 search results - page 1 / 25 » Supporting system-level power exploration for DSP applicatio... |
GLVLSI
2000
IEEE
14 years 17 hour ago
2000
IEEE
System-level power exploration requires tools for estimation of the overall power consumed by a system, as well as a detailed breakdown of the consumption of its main functional b...
SAC
2004
ACM
14 years 1 months ago
2004
ACM
High mask and production costs for the newest CMOS silicon technologies increase the pressure to develop hardware platforms useable for different applications or variants of the s...
ISSS
1997
IEEE
13 years 11 months ago
1997
IEEE
In this paper, our memory architecture exploration methodology and CAD techniques for network protocol applications are presented. Prototype tools have been implemented, and appli...
ISCAS
2003
IEEE
14 years 26 days ago
2003
IEEE
Conventional ASIC designs are hard to be customized. Therefore DSP core-based ASIC design has potentially large payoff. This approach not only supports improved performance but al...
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...