A temporal correlation based port combination algorithm that customizes the router design in Network-on-Chip (NoC) is proposed for reconfigurable systems in order to minimize req...
We present a unique FPGA that uses a mix of digital and large-signal analog computation for the simulation of gene regulatory networks. The prototype IC consists of a 4x5 array of...
Ilias Tagkopoulos, Charles A. Zukowski, German Cav...
This paper proposes a new priority scheduling algorithm to maximise site revenue of session-based multi-tier Internet services in a multicluster environment. This research is part...
This paper discusses our implementation and experience with a camera-based whiteboard scanner. The ZombieBoard system (so called because it brings to electronic life the marks on a...
Automated addition of fault-tolerance to existing programs is highly desirable, as it allows the designer to focus on the system behavior in the absence of faults and leave the fa...