Sciweavers

327 search results - page 17 / 66
» Symbolic Fault Injection
Sort
View
EDCC
2010
Springer
14 years 12 days ago
Comparing and Validating Measurements of Dependability Attributes
—This paper investigates sources of uncertainty in measurement results obtained using three different fault injection techniques. Two software-implemented and one test port-based...
Daniel Skarin, Raul Barbosa, Johan Karlsson
DATE
2004
IEEE
121views Hardware» more  DATE 2004»
13 years 11 months ago
Experiences during the Experimental Validation of the Time-Triggered Architecture
During last years, the Time-Triggered Architecture (TTA) has been gaining acceptance as a generic architecture for highly dependable real-time systems. It is now being used to imp...
Sara Blanc, Joaquin Gracia, Pedro J. Gil
CHES
2004
Springer
170views Cryptology» more  CHES 2004»
14 years 1 months ago
Concurrent Error Detection Schemes for Involution Ciphers
Because of the rapidly shrinking dimensions in VLSI, transient and permanent faults arise and will continue to occur in the near future in increasing numbers. Since cryptographic c...
Nikhil Joshi, Kaijie Wu, Ramesh Karri
HPCA
2009
IEEE
14 years 8 months ago
Accurate microarchitecture-level fault modeling for studying hardware faults
Decreasing hardware reliability is expected to impede the exploitation of increasing integration projected by Moore's Law. There is much ongoing research on efficient fault t...
Man-Lap Li, Pradeep Ramachandran, Ulya R. Karpuzcu...
DDECS
2007
IEEE
121views Hardware» more  DDECS 2007»
14 years 1 months ago
A Novel Parity Bit Scheme for SBox in AES Circuits
– This paper addresses an efficient concurrent fault detection scheme for the SBox hardware implementation of the AES algorithm. Concurrent fault detection is important not only ...
Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouze...