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FDL
2007
IEEE
13 years 11 months ago
Towards Assertion Based Verification of Analog and Mixed Signal Designs Using PSL
Abstract-- Analog and Mixed Signal (AMS) designs are important integrated systems that link digital circuits to the analog world. Following the success of PSL verification methodol...
Ghiath Al Sammane, Mohamed H. Zaki, Zhi Jie Dong, ...
ICCAD
2003
IEEE
205views Hardware» more  ICCAD 2003»
14 years 22 days ago
Statistical Timing Analysis for Intra-Die Process Variations with Spatial Correlations
Process variations have become a critical issue in performance verification of high-performance designs. We present a new, statistical timing analysis method that accounts for int...
Aseem Agarwal, David Blaauw, Vladimir Zolotov
FPGA
2005
ACM
215views FPGA» more  FPGA 2005»
14 years 29 days ago
Design, layout and verification of an FPGA using automated tools
Creating a new FPGA is a challenging undertaking because of the significant effort that must be spent on circuit design, layout and verification. It currently takes approximately ...
Ian Kuon, Aaron Egier, Jonathan Rose
COLT
2008
Springer
13 years 9 months ago
Learning Acyclic Probabilistic Circuits Using Test Paths
We define a model of learning probabilistic acyclic circuits using value injection queries, in which an arbitrary subset of wires is set to fixed values, and the value on the sing...
Dana Angluin, James Aspnes, Jiang Chen, David Eise...
DAC
1997
ACM
13 years 11 months ago
A C-Based RTL Design Verification Methodology for Complex Microprocessor
Cr, As the complexity of high-performance microprocessor increases, functional verification becomes more and more difficult and RTL simulation emerges as the bottleneck of the des...
Joon-Seo Yim, Yoon-Ho Hwang, Chang-Jae Park, Hoon ...