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HPCA
2001
IEEE
14 years 8 months ago
Speculative Data-Driven Multithreading
Mispredicted branches and loads that miss in the cache cause the majority of retirement stalls experienced by sequential processors; we call these critical instructions. Despite t...
Amir Roth, Gurindar S. Sohi
ICCAD
2008
IEEE
105views Hardware» more  ICCAD 2008»
14 years 4 months ago
Parameterized transient thermal behavioral modeling for chip multiprocessors
In this paper, we propose a new architecture-level parameterized transient thermal behavioral modeling algorithm for emerging thermal related design and optimization problems for ...
Duo Li, Sheldon X.-D. Tan, Eduardo H. Pacheco, Mur...
CLUSTER
2009
IEEE
14 years 2 months ago
Scalable I/O forwarding framework for high-performance computing systems
—Current leadership-class machines suffer from a significant imbalance between their computational power and their I/O bandwidth. While Moore’s law ensures that the computatio...
Nawab Ali, Philip H. Carns, Kamil Iskra, Dries Kim...
SYSTOR
2009
ACM
14 years 2 months ago
DHIS: discriminating hierarchical storage
A typical storage hierarchy comprises of components with varying performance and cost characteristics, providing multiple options for data placement. We propose and evaluate a hie...
Chaitanya Yalamanchili, Kiron Vijayasankar, Erez Z...
ISCA
2008
IEEE
113views Hardware» more  ISCA 2008»
14 years 2 months ago
A Two-Level Load/Store Queue Based on Execution Locality
Multicore processors have emerged as a powerful platform on which to efficiently exploit thread-level parallelism (TLP). However, due to Amdahl’s Law, such designs will be incr...
Miquel Pericàs, Adrián Cristal, Fran...