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» Synchronous Design and Verification of Critical Embedded Sys...
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ECRTS
2000
IEEE
13 years 11 months ago
Towards validated real-time software
We present a tool for the design and validation of embedded real-time applications. The tool integrates two approaches, the use of the synchronous programming language ESTEREL for...
Valérie Bertin, Michel Poize, Jacques Pulou...
ICESS
2005
Springer
14 years 26 days ago
Separate Compilation for Synchronous Modules
Abstract. Synchronous models are useful for designing real-time embedded systems because they provide timing control and deterministic concurrency. However, the semantics of such m...
Jia Zeng, Stephen A. Edwards
HASE
2008
IEEE
13 years 7 months ago
Aiding Modular Design and Verification of Safety-Critical Time-Triggered Systems by Use of Executable Formal Specifications
Designing safety-critical systems is a complex process, and especially when the design is carried out at different f abstraction where the correctness of the design at one level i...
Kohei Sakurai, Péter Bokor, Neeraj Suri
DAC
1999
ACM
13 years 11 months ago
Verification and Management of a Multimillion-Gate Embedded Core Design
Verification is one of the most critical and time-consuming tasks in today's design processes. This paper demonstrates the verification process of a 8.8 million gate design u...
Johann Notbauer, Thomas W. Albrecht, Georg Niedris...
DAC
2006
ACM
14 years 8 months ago
Efficient simulation of critical synchronous dataflow graphs
Simulation and verification using electronic design automation (EDA) tools are key steps in the design process for communication and signal processing systems. The synchronous dat...
Chia-Jui Hsu, José Luis Pino, Ming-Yung Ko,...