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ESORICS
2006
Springer
14 years 7 days ago
Timing-Sensitive Information Flow Analysis for Synchronous Systems
Timing side channels are a serious threat to the security of cryptographic algorithms. This paper presents a novel method for the timing-sensitive analysis of information flow in s...
Boris Köpf, David A. Basin
ICCAD
2006
IEEE
146views Hardware» more  ICCAD 2006»
14 years 2 months ago
Cost-aware synthesis of asynchronous circuits based on partial acknowledgement
Designing asynchronous circuits by reusing existing synchronous tools has become a promising solution to the problem of poor CAD support in asynchronous world. A straightforward w...
Yu Zhou, Danil Sokolov, Alexandre Yakovlev
ISCAS
2007
IEEE
112views Hardware» more  ISCAS 2007»
14 years 2 months ago
A New Statistical Approach for Glitch Estimation in Combinational Circuits
— Low-power consumption has become a highly important concern for synchronous standard-cell design, and consequently mandates the use of low-power design methodologies and techni...
Ahmed Sayed, Hussain Al-Asaad
ISVLSI
2006
IEEE
106views VLSI» more  ISVLSI 2006»
14 years 2 months ago
Self-Timed Thermally-Aware Circuits
Thermal management is becoming increasingly important in circuit designs with high power density. Circuits that overheat beyond specified operating conditions may suffer timing f...
David Fang, Filipp Akopyan, Rajit Manohar
CODES
2007
IEEE
14 years 16 days ago
Synchronization after design refinements with sensitive delay elements
The synchronous computational model with its simple computation and communication mechanism makes it easy to describe, simulate and formally verify synchronous embedded systems at...
Tarvo Raudvere, Ingo Sander, Axel Jantsch