A low overhead DFT technique, called clock-grouping, for delay testing of sequential synchronous circuits is presented. The proposed technique increases robust path delay fault co...
— In recent years, many people have been trying to develop some applications to information processing by exploiting oscillatory phenomena in neural networks. Bifurcation and sta...
This paper describes a novel approach to high-level synthesis of complex pipelined circuits, including pipelined circuits with feedback. This approach combines a high-level, modula...
Dynamic synchronous Transfer Mode (DTM) is a new protocol suite based on synchronous fast circuit switching. The DTM network is based on bandwidth reservation and supports dynamic...
A Real-Time audio watermarking system is presented. System contains two circuits: the marker circuit and the detector circuit. Watermark detection is blind, so, there is no necess...
Jose Juan Garcia Hernandez, Mariko Nakano-Miyatake...