243 search results - page 26 / 49 » Synchronous Elastic Circuits |
DSD
2010
IEEE
13 years 6 months ago
2010
IEEE
Asynchronous circuit implementations operating under strong constraints (DIMS, Direct Logic, some of NCL gates, etc.) are attractive due to: 1) regularity; 2) combined implementati...
TE
2010
13 years 3 months ago
2010
Abstract--As demand increases for circuits with higher performance, higher complexity, and decreased feature size, asynchronous (clockless) paradigms will become more widely used i...
ICCD
2004
IEEE
14 years 5 months ago
2004
IEEE
Abstract— This paper proposes a technique for creating a combinational logic network with an output that signals when all other outputs have stabilized. The method is based on du...
ISLPED
1997
ACM
14 years 24 days ago
1997
ACM
This paper proposes a novel method to estimate and to reduce redundant power of synchronous circuits at RT level design. Because much redundant power is caused by redundant clocki...
SENSYS
2009
ACM
14 years 3 months ago
2009
ACM
Clock synchronization is highly desirable in many sensor networking applications. It enables event ordering, coordinated actuation, energy-efficient communication and duty cyclin...