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» Synchronous Interlocked Pipelines
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VLSID
2006
IEEE
71views VLSI» more  VLSID 2006»
14 years 1 months ago
Clockless Pipelining for Coarse Grain Datapaths
In this paper, we present two novel synchronization approaches to support data flow in clockless designs using single-rail encoding. Both approaches are based on self-resetting st...
Abdelhalim Alsharqawi, Abdel Ejnioui
IFIP
2010
Springer
13 years 2 months ago
Dependency-Driven Distribution of Synchronous Programs
Abstract In this paper, we describe an automatic synthesis procedure that distributes synchronous programs on a set of desynchronized processing elements. Our distribution procedur...
Daniel Baudisch, Jens Brandt, Klaus Schneider
CLUSTER
2007
IEEE
14 years 1 months ago
Optimal synchronization frequency for dynamic pipelined computations on heterogeneous systems
— In this paper we give a theoretical model for determining the synchronization frequency that minimizes the parallel execution time of loops with uniform dependencies dynamicall...
Florina M. Ciorba, Ioannis Riakiotakis, Theodore A...
EUROMICRO
1999
IEEE
13 years 11 months ago
Delft-Java Dynamic Translation
This paper describes the DELFT-JAVA processor and the mechanisms required to dynamically translate JVM instructions into DELFT-JAVA instructions. Using a form of hardware register...
C. John Glossner, Stamatis Vassiliadis
GLVLSI
2003
IEEE
152views VLSI» more  GLVLSI 2003»
14 years 22 days ago
Dynamic single-rail self-timed logic structures for power efficient synchronous pipelined designs
The realization of fast datapaths in signal processing environments requires fastest, power efficient logic styles with synchronous behavior. This paper presents a method to combi...
Frank Grassert, Dirk Timmermann