171 search results - page 7 / 35 » Synthesis of Efficient Linear Test Pattern Generators |
DSD
2010
IEEE
13 years 7 months ago
2010
IEEE
— In this paper we propose a new method of test patterns compression based on a design of a dedicated SAT-based ATPG (Automatic Test Pattern Generator). This compression method i...
ISCAS
1999
IEEE
14 years 1 months ago
1999
IEEE
The main objectives of Built-In Self Test (BIST) are the design of test pattern generator circuits which achieve the highest fault coverage, require the shortest sequence of test ...
GECCO
2008
Springer
13 years 10 months ago
2008
Springer
An evolutionary synthesis method to design low-sensitivity IIR filters with linear phase in the passband is presented. The method uses a chromosome coding scheme based on the grap...
EURODAC
1990
IEEE
14 years 1 months ago
1990
IEEE
In this paper an efficient cone oriented circuit partitioning method is presented, which significantly speeds up automatic test pattern generation for combinational circuits. The ...
ITC
1994
IEEE
14 years 1 months ago
1994
IEEE
Previous approaches to designing random pattern testable circuits use post-synthesis test point insertion to eliminate random pattern resistant (r.p.r.) faults. The approach taken...