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» Synthesis of Fault-Tolerant Embedded Systems
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PRDC
1999
IEEE
13 years 11 months ago
An Architecture-Based Software Reliability Model
In this paper we present an analytical model for estimating architecture-based software reliability, according to the reliability of each component, the operational profile, and t...
Wen-Li Wang, Ye Wu, Mei-Hwa Chen
RTCSA
2000
IEEE
13 years 12 months ago
Scheduling optional computations in fault-tolerant real-time systems
This paper introduces an exact schedulability analysis for the optional computation model urider a specified failure hypothesis. From this analysis, we propose a solutionfor deter...
Pedro Mejía-Alvarez, Hakan Aydin, Daniel Mo...
ECRTS
1999
IEEE
13 years 11 months ago
Cluster simulation-support for distributed development of hard real-time systems using TDMA-based communication
In the eld of safety-critical real-time systems the development of distributed applications for fault tolerance reasons is a common practice. Hereby the whole application is divid...
Thomas M. Galla, Roman Pallierer
ISLPED
2005
ACM
136views Hardware» more  ISLPED 2005»
14 years 1 months ago
Energy efficient SEU-tolerance in DVS-enabled real-time systems through information redundancy
Concerns about the reliability of real-time embedded systems that employ dynamic voltage scaling has recently been highlighted [1,2,3], focusing on transient-fault-tolerance techn...
Alireza Ejlali, Marcus T. Schmitz, Bashir M. Al-Ha...
SBCCI
2004
ACM
117views VLSI» more  SBCCI 2004»
14 years 27 days ago
Reducing test time with processor reuse in network-on-chip based systems
This paper proposes a test planning method capable of reusing available processors as test sources and sinks, and the on-chip network as the access mechanism for the test of cores...
Alexandre M. Amory, Érika F. Cota, Marcelo ...