328 search results - page 36 / 66 » Synthesis of Fault-Tolerant Embedded Systems |
DSD
2010
IEEE
13 years 5 months ago
2010
IEEE
We present a high-level synthesis flow for mapping an algorithm description (in C) to a provably equivalent registertransfer level (RTL) description of hardware. This flow uses an ...
DT
2000
13 years 7 months ago
2000
The design of complex embedded systems involves the simultaneous optimization of several often competing objectives. Instead of a single optimal design, there is rather a set of a...
CODES
1999
IEEE
13 years 12 months ago
1999
IEEE
We present an approach to process scheduling for synthesis of safety-critical distributed embedded systems. Our system model captures both the flow of data and that of control. Th...
CODES
2001
IEEE
13 years 11 months ago
2001
IEEE
We review the use of nondeterminism and identify two different purposes. The descriptive purpose handles uncertainties in the behaviour of existing entities. The constraining purp...
DATE
2000
IEEE
13 years 12 months ago
2000
IEEE
We present an approach to bus access optimization and schedulability analysis for the synthesis of hard real-time distributed embedded systems. The communication model is based on...