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» Synthesis of Non-Interferent Timed Systems
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FMICS
2006
Springer
13 years 11 months ago
Test Coverage for Loose Timing Annotations
Abstract. The design flow of systems-on-a-chip (SoCs) identifies several abstraction levels higher than the Register-Transfer-Level that constitutes the input of the synthesis tool...
Claude Helmstetter, Florence Maraninchi, Laurent M...
ICDCS
1995
IEEE
13 years 11 months ago
Analysis of Resource Lower Bounds in Real-Time Applications
Tasks in a real-time application usually have several stringent timing, resource, and communication requirements. Designing a distributed computing system which can meet all these...
Raed Alqadi, Parameswaran Ramanathan
ATAL
2008
Springer
13 years 9 months ago
Synthesis of strategies from interaction traces
We describe how to take a set of interaction traces produced by different pairs of players in a two-player repeated game, and combine them into a composite strategy. We provide an...
Tsz-Chiu Au, Sarit Kraus, Dana S. Nau
ICCAD
2000
IEEE
119views Hardware» more  ICCAD 2000»
14 years 1 days ago
Synthesis of Operation-Centric Hardware Descriptions
Most hardware description frameworks, whether schematic or textual, use cooperating finite state machines (CFSM) as the underlying abstraction. In the CFSM framework, a designer ...
James C. Hoe, Arvind
DAC
1998
ACM
13 years 12 months ago
Synthesis of Power-Optimized and Area-Optimized Circuits from Hierarchical Behavioral Descriptions
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
Ganesh Lakshminarayana, Niraj K. Jha