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» Synthesis of Non-Interferent Timed Systems
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ICC
2007
IEEE
102views Communications» more  ICC 2007»
14 years 2 months ago
A Scalable Wireless Channel Emulator for Broadband MIMO Systems
: This paper addresses the issue of designing scalable prototypes for multi input multi output (MIMO) wireless channel emulation. To date, emulators are extending single input sing...
Hamid Eslami, Ahmed M. Eltawil
ICCAD
2005
IEEE
98views Hardware» more  ICCAD 2005»
14 years 4 months ago
Clustering for processing rate optimization
Clustering (or partitioning) is a crucial step between logic synthesis and physical design in the layout of a large scale design. A design verified at the logic synthesis level m...
Chuan Lin, Jia Wang, Hai Zhou
CORR
2010
Springer
169views Education» more  CORR 2010»
13 years 7 months ago
Artificial Hormone Reaction Networks: Towards Higher Evolvability in Evolutionary Multi-Modular Robotics
The semi-automatic or automatic synthesis of robot controller software is both desirable and challenging. Synthesis of rather simple behaviors such as collision avoidance by apply...
Heiko Hamann, Jürgen Stradner, Thomas Schmick...
CODES
2006
IEEE
14 years 1 months ago
Data reuse driven energy-aware MPSoC co-synthesis of memory and communication architecture for streaming applications
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...
Ilya Issenin, Nikil Dutt
FPL
2004
Springer
205views Hardware» more  FPL 2004»
14 years 1 months ago
A System Level Resource Estimation Tool for FPGAs
Abstract. High level modeling tools make it possible to synthesize a high performance FPGA design directly from a Simulink model. Accurate estimates of the FPGA resources required ...
Changchun Shi, James Hwang, Scott McMillan, Ann Ro...