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LCTRTS
2001
Springer
13 years 12 months ago
2001
Springer
The IA-64 architecture has been designed as a synthesis of VLIW and superscalar design principles. It incorporates typical functionality known from embedded processors as multiply...
ISLPED
2003
ACM
14 years 22 days ago
2003
ACM
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
LCPC
2001
Springer
13 years 12 months ago
2001
Springer
Abstract. The DEFACTO project - a Design Environment For Adaptive Computing TechnOlogy - is a system that maps computations, expressed in high-level languages such as C, directly o...
DAC
1997
ACM
13 years 11 months ago
1997
ACM
In order to efficiently design complex microelectromechanical systems (MEMS) having large numbers of multi-domain components, a hierarchically structured design approach that is ...
CEC
2008
IEEE
14 years 1 months ago
2008
IEEE
— The high-level synthesis process involves three interdependent and NP-complete optimization problems: (i) the operation scheduling, (ii) the resource allocation, and (iii) the ...