150 search results - page 21 / 30 » Synthesis of Optimal Workflow Structure |
IROS
2006
IEEE
14 years 1 months ago
2006
IEEE
— A new biped gait generation and optimization method is proposed in the frame of Estimation of Distribution Algorithms (EDAs) with Q-learning method. By formulating the biped ga...
FPGA
2006
ACM
13 years 11 months ago
2006
ACM
The paper presents several improvements to state-of-theart in FPGA technology mapping exemplified by a recent advanced technology mapper DAOmap [Chen and Cong, ICCAD `04]. Improve...
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
Abstract: An original technique to transform functional representation of the design into a structural representation in form of a data flow graph (DFG) is described. A canonical,...
FCCM
2009
IEEE
14 years 2 months ago
2009
IEEE
This paper will describe the architecture of a compiler which will convert an untimed C description of a set of floating point expressions into a synthesizable datapath optimized ...
ISCAS
2006
IEEE
14 years 1 months ago
2006
IEEE
— Reduced ordered Binary Decision Diagrams (BDDs) are a data structure for efficient representation and manipulation of Boolean functions. They are frequently used in logic synt...