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IJCV
2000
110views more  IJCV 2000»
13 years 8 months ago
A Parametric Texture Model Based on Joint Statistics of Complex Wavelet Coefficients
We present a universal statistical model for texture images in the context of an overcomplete complex wavelet transform. The model is parameterized by a set of statistics computed ...
Javier Portilla, Eero P. Simoncelli
DAC
2006
ACM
14 years 9 months ago
Generation of yield-aware Pareto surfaces for hierarchical circuit design space exploration
Pareto surfaces in the performance space determine the range of feasible performance values for a circuit topology in a given technology. We present a non-dominated sorting based ...
Saurabh K. Tiwary, Pragati K. Tiwary, Rob A. Ruten...
TCAD
2002
121views more  TCAD 2002»
13 years 8 months ago
Robust Boolean reasoning for equivalence checking and functional property verification
Many tasks in CAD, such as equivalence checking, property checking, logic synthesis, and false paths analysis require efficient Boolean reasoning for problems derived from circuits...
Andreas Kuehlmann, Viresh Paruthi, Florian Krohm, ...
ASPDAC
2008
ACM
104views Hardware» more  ASPDAC 2008»
13 years 10 months ago
Variability-driven module selection with joint design time optimization and post-silicon tuning
Abstract-- Increasing delay and power variation are significant challenges to the designers as technology scales to the deep sub-micron (DSM) regime. Traditional module selection t...
Feng Wang 0004, Xiaoxia Wu, Yuan Xie
FORMATS
2008
Springer
13 years 10 months ago
Timed Parity Games: Complexity and Robustness
We consider two-player games played in real time on game structures with clocks and parity objectives. The games are concurrent in that at each turn, both players independently pro...
Krishnendu Chatterjee, Thomas A. Henzinger, Vinaya...