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» Synthesis of Self-Testable Controllers
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EC
2010
133views ECommerce» more  EC 2010»
15 years 2 months ago
Interactive EC Control of Synthesized Timbre
Perhaps the biggest limitation of interactive EC is the fitness evaluation bottleneck, caused by slow user evaluation and leading to small populations and user fatigue. In this st...
James McDermott, Michael O'Neill, Niall J. L. Grif...
ICRA
1999
IEEE
104views Robotics» more  ICRA 1999»
15 years 7 months ago
Discrete Event Control with Active Events
Abstract--The traditional framework for discrete-event control is extended to include the case of control with active events, in which both the user and the environment have events...
Michael Heymann, Feng Lin, George Meyer, Satya Ran...
135
Voted
ISSS
1998
IEEE
103views Hardware» more  ISSS 1998»
15 years 6 months ago
False Path Analysis Based on a Hierarchical Control Representation
False path analysis is an activity with applications in a variety of computer science and engineering domains like for instance high-level synthesis, worst case execution time est...
Apostolos A. Kountouris, Christophe Wolinski
122
Voted
ISVLSI
2005
IEEE
69views VLSI» more  ISVLSI 2005»
15 years 8 months ago
Pipelined Memory Controllers for DSP Applications Handling Unpredictable Data Accesses
Multimedia applications are often characterized by a large number of data accesses with regular and periodic access patterns. In these cases, optimized pipelined memory access con...
Bertrand Le Gal, Emmanuel Casseau, Sylvain Huet, E...
ICCAD
1997
IEEE
96views Hardware» more  ICCAD 1997»
15 years 6 months ago
Resource sharing in hierarchical synthesis
This paper presents a new approach to hierarchical high-level synthesis with respect to internal register-transfer structures of complex components. Entire subdesigns can efficie...
Oliver Bringmann, Wolfgang Rosenstiel