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VLSID
2007
IEEE
231views VLSI» more  VLSID 2007»
14 years 8 months ago
AHIR: A Hardware Intermediate Representation for Hardware Generation from High-level Programs
We present AHIR, an intermediate representation (IR), that acts as a transition layer between software compilation and hardware synthesis. Such a transition layer is intended to t...
Sameer D. Sahasrabuddhe, Hakim Raja, Kavi Arya, Ma...
KBSE
2007
IEEE
14 years 2 months ago
Diconic addition of failsafe fault-tolerance
We present a divide-and-conquer method, called DiConic, for automatic addition of failsafe fault-tolerance to distributed programs, where a failsafe program guarantees to meet its...
Ali Ebnenasir
CODES
2004
IEEE
13 years 11 months ago
Automatic synthesis of system on chip multiprocessor architectures for process networks
In this paper, we present an approach for automatic synthesis of System on Chip (SoC) multiprocessor architectures for applications expressed as process networks. Our approach is ...
Basant Kumar Dwivedi, Anshul Kumar, M. Balakrishna...
DATE
2006
IEEE
152views Hardware» more  DATE 2006»
14 years 1 months ago
Adaptive chip-package thermal analysis for synthesis and design
Ever-increasing integrated circuit (IC) power densities and peak temperatures threaten reliability, performance, and economical cooling. To address these challenges, thermal analy...
Yonghong Yang, Zhenyu (Peter) Gu, Changyun Zhu, Li...
GPEM
2006
97views more  GPEM 2006»
13 years 7 months ago
Evolving recursive programs by using adaptive grammar based genetic programming
Genetic programming (GP) extends traditional genetic algorithms to automatically induce computer programs. GP has been applied in a wide range of applications such as software ree...
Man Wong