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ICCAD
1999
IEEE
80views Hardware» more  ICCAD 1999»
13 years 12 months ago
What is the cost of delay insensitivity?
Deep submicron technology calls for new design techniques, in which wire and gate delays are accounted to have equal or nearly equal effect on circuit behaviour. Asynchronous spee...
Hiroshi Saito, Alex Kondratyev, Jordi Cortadella, ...
INFFUS
2007
117views more  INFFUS 2007»
13 years 7 months ago
Pixel-based and region-based image fusion schemes using ICA bases
The task of enhancing the perception of a scene by combining information captured by different sensors is usually known as image fusion. The pyramid decomposition and the Dual-Tr...
Nikolaos Mitianoudis, Tania Stathaki
GLVLSI
2007
IEEE
151views VLSI» more  GLVLSI 2007»
13 years 11 months ago
Hand-in-hand verification of high-level synthesis
This paper describes a formal verification methodology of highnthesis (HLS) process. The abstraction level of the input to HLS is so high compared to that of the output that the v...
Chandan Karfa, Dipankar Sarkar, Chittaranjan A. Ma...
ISCAS
1999
IEEE
114views Hardware» more  ISCAS 1999»
13 years 12 months ago
Nonuniformly offset polyphase synthesis of a bandpass signal from complex-envelope samples
In this paper we consider the synthesis of a bandpass signal from complex-envelope samples using a polyphase conversion structure based on periodically nonuniform output samples. ...
D. Scholnik, J. O. Coleman
VLSI
2007
Springer
14 years 1 months ago
Incremental placement for structured ASICs using the transportation problem
— While physically driven synthesis techniques have proven to be an effective method to meet tight timing constraints required by a design, the incremental placement step during ...
Andrew C. Ling, Deshanand P. Singh, Stephen Dean B...