3 search results - page 1 / 1 » Synthesis of a novel timing-error detection architecture |
TODAES
2008
13 years 9 months ago
2008
VLSID
2002
IEEE
14 years 11 months ago
2002
IEEE
We propose the redundancy identification of wire replacement faults. The solutions rely on the satisfiability (SAT) formulation of redundancy identification, augmented with the me...
DAC
2003
ACM
14 years 12 months ago
2003
ACM
Software-based self-test (SBST) is an emerging approach to address the challenges of high-quality, at-speed test for complex programmable processors and systems-on chips (SoCs) th...