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» Synthesis of locally exhaustive test pattern generators
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DATE
1999
IEEE
111views Hardware» more  DATE 1999»
13 years 11 months ago
Sequential Circuit Test Generation Using Decision Diagram Models
A novel approach to testing sequential circuits that uses multi-level decision diagram representations is introduced. The proposed algorithm consists of a combination of scanning ...
Jaan Raik, Raimund Ubar
DATE
2004
IEEE
158views Hardware» more  DATE 2004»
13 years 11 months ago
Automatic Scan Insertion and Pattern Generation for Asynchronous Circuits
This paper presents 3LSSD, a novel, easilyautomatable approach for scan insertion and ATPG of asynchronous circuits. 3LSSD inserts scan latches only into global circuit feedback p...
Aristides Efthymiou, Christos P. Sotiriou, Douglas...
IJCAI
1997
13 years 8 months ago
Hidden Gold in Random Generation of SAT Satisfiable Instances
Evaluation of incomplete algorithms that solve SAT requires to generate hard satisfiable instances. For that purpose, the kSAT uniform random generation is not usable. The other g...
Thierry Castell, Michel Cayrol
COMPSAC
2008
IEEE
13 years 7 months ago
Superfit Combinational Elusive Bug Detection
Software that has been well tested and analyzed may fail unpredictably when a certain combination of conditions occurs. In Bounded Exhaustive Testing (BET) all combinations are te...
R. Barzin, S. Fukushima, William E. Howden, S. Sha...
DFT
2003
IEEE
64views VLSI» more  DFT 2003»
14 years 23 days ago
Hybrid BIST Time Minimization for Core-Based Systems with STUMPS Architecture
1 This paper presents a solution to the test time minimization problem for core-based systems that contain sequential cores with STUMPS architecture. We assume a hybrid BIST approa...
Gert Jervan, Petru Eles, Zebo Peng, Raimund Ubar, ...