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» Synthesis of locally exhaustive test pattern generators
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DATE
1999
IEEE
147views Hardware» more  DATE 1999»
13 years 11 months ago
Efficient BIST Hardware Insertion with Low Test Application Time for Synthesized Data Paths
In this paper, new and efficient BIST methodology and BIST hardware insertion algorithms are presented for RTL data paths obtained from high level synthesis. The methodology is ba...
Nicola Nicolici, Bashir M. Al-Hashimi
FPGA
2008
ACM
174views FPGA» more  FPGA 2008»
13 years 9 months ago
Pattern-based behavior synthesis for FPGA resource reduction
Pattern-based synthesis has drawn wide interest from researchers who tried to utilize the regularity in applications for design optimizations. In this paper we present a general p...
Jason Cong, Wei Jiang
KES
2004
Springer
14 years 25 days ago
Extracting Stellar Population Parameters of Galaxies from Photometric Data Using Evolution Strategies and Locally Weighted Linea
There is now a huge amount of high quality photometric data available in the literature whose analysis is bound to play a fundamental role in studies of the formation and evolution...
Luis Alvarez, Olac Fuentes, Roberto Terlevich
KDD
2008
ACM
195views Data Mining» more  KDD 2008»
14 years 8 months ago
Anomaly pattern detection in categorical datasets
We propose a new method for detecting patterns of anomalies in categorical datasets. We assume that anomalies are generated by some underlying process which affects only a particu...
Kaustav Das, Jeff G. Schneider, Daniel B. Neill
DATE
1998
IEEE
110views Hardware» more  DATE 1998»
13 years 11 months ago
Scheduling and Module Assignment for Reducing Bist Resources
Built-in self-test BIST techniques modify functional hardware to give a data path the capability to test itself. The modi cation of data path registers into registers BIST resourc...
Ishwar Parulkar, Sandeep K. Gupta, Melvin A. Breue...