419 search results - page 38 / 84 » Synthesis of networks on chips for 3D systems on chips |
SP
2010
IEEE
14 years 17 days ago
2010
IEEE
—EMV is the dominant protocol used for smart card payments worldwide, with over 730 million cards in circulation. Known to bank customers as “Chip and PIN”, it is used in Eur...
ICES
2003
Springer
14 years 1 months ago
2003
Springer
This paper presents a methodology to design optimized electronic systems from high abstraction level descriptions. The methodology uses Genetic Programming in addition to high-leve...
DATE
2006
IEEE
14 years 2 months ago
2006
IEEE
In recent years, Assertion-Based Verification is being widely accepted as a key technology in the pre-silicon validation of system-on-chip(SOC) designs. The System Verilog langua...
DATE
2007
IEEE
14 years 3 months ago
2007
IEEE
The clock tree is the interconnect net on Systems-on-Chip (SoCs) with the heaviest load and consumes up to 40% of the overall power budget. Substantial savings of the overall powe...
IWANN
1999
Springer
14 years 29 days ago
1999
Springer
Recently, a real-time clustering microchip based on the ART1 algorithm has been reported. That chip was able to classify 100-bit input patterns into up to 18 categories. However, i...