419 search results - page 43 / 84 » Synthesis of networks on chips for 3D systems on chips |
FCCM
2002
IEEE
14 years 1 months ago
2002
IEEE
Several projects have developed compiler tools that translate high-level languages down to hardware description languages for mapping onto FPGAbased reconfigurable computers. Thes...
ASPDAC
2008
ACM
13 years 10 months ago
2008
ACM
- We present a topology synthesis method for high performance System-on-Chip (SoC) design. Our method provides an optimal topology of on-chip communication network for the given ba...
DAC
2002
ACM
14 years 9 months ago
2002
ACM
This paper addresses the problem of automatic generation of implementation software from high-level functional specifications in the context of embedded system on chip designs. So...
FPL
2009
Springer
14 years 16 days ago
2009
Springer
Field Programmable Gate Arrays (FPGAs) have long held the promise of allowing designers to create systems with performance levels close to custom circuits but with a software-like...
ARC
2012
Springer
12 years 4 months ago
2012
Springer
As the size of FPGA devices grows following Moore’s law, it becomes possible to put a complete manycore system onto a single FPGA chip. The centralized memory hierarchy on typica...