419 search results - page 56 / 84 » Synthesis of networks on chips for 3D systems on chips |
SIGGRAPH
2000
ACM
14 years 1 months ago
2000
ACM
We present the WarpEngine, an architecture designed for realtime image-based rendering of natural scenes from arbitrary viewpoints. The modeling primitives are real-world images w...
ASPDAC
2008
ACM
13 years 10 months ago
2008
ACM
Since 2001, there have been a myriad of papers on systematic analysis of Multi-Processor System on Chip (MPSoC) and Network on Chip (NoC). Nevertheless, we only have a few of their...
RECONFIG
2008
IEEE
14 years 3 months ago
2008
IEEE
Platform FPGAs are capable of hosting entire Linuxbased systems including standard peripherals, integrated network interface cards and even disk controllers on a single chip. File...
ISCA
2008
IEEE
14 years 3 months ago
2008
IEEE
We expect that many-core microprocessors will push performance per chip from the 10 gigaflop to the 10 teraflop range in the coming decade. To support this increased performance...
ISLPED
2005
ACM
14 years 2 months ago
2005
ACM
As the number of cores on a chip increases, power consumed by the communication structures takes significant portion of the overall power-budget. The individual components of the...