419 search results - page 72 / 84 » Synthesis of networks on chips for 3D systems on chips |
RTAS
1997
IEEE
14 years 24 days ago
1997
IEEE
ÐWith effective packet-scheduling mechanisms, modern integrated networks can support the diverse quality-of-service requirements of emerging applications. However, arbitrating bet...
DATE
2009
IEEE
14 years 3 months ago
2009
IEEE
In modern digital ICs, the increasing demand for performance and throughput requires operating frequencies of hundreds of megahertz, and in several cases exceeding the gigahertz r...
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
The performance of a system, especially a multiprocessor system, heavily depends upon the efficiency of its bus architecture. This paper presents a methodology to generate a custo...
NOCS
2007
IEEE
14 years 2 months ago
2007
IEEE
Network-on-Chip (NoC) architectures have a wide variety of parameters that can be adapted to the designer’s requirements. Fast exploration of this parameter space is only possib...
AINA
2007
IEEE
14 years 2 months ago
2007
IEEE
Continuous improvements in integration scale have made major microprocessor vendors to move to designs that integrate several processor cores on the same chip. Chip-multiprocessor...