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» Synthesis of quantum logic circuits
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CASES
2001
ACM
13 years 11 months ago
Pattern matching in reconfigurable logic for packet classification
We describe a digital circuit synthesis algorithm specialized for the domain of pattern matching circuits implemented in reconfigurable logic. We propose to use this algorithm as ...
Adam Johnson, Kenneth Mackenzie
ICCAD
1995
IEEE
88views Hardware» more  ICCAD 1995»
13 years 11 months ago
LOT: logic optimization with testability-new transformations using recursive learning
: A new approach to optimize multi-level logic circuits is introduced. Given a multi-level circuit, the synthesis method optimizes its area, simultaneously enhancing its random pat...
Mitrajit Chatterjee, Dhiraj K. Pradhan, Wolfgang K...
DAC
1999
ACM
13 years 11 months ago
Automated Phase Assignment for the Synthesis of Low Power Domino Circuits
High performance circuit techniques such as domino logic have migrated from the microprocessor world into more mainstream ASIC designs. The problem is that domino logic comes at a...
Priyadarshan Patra, Unni Narayanan
ITC
1994
IEEE
151views Hardware» more  ITC 1994»
13 years 11 months ago
Automated Logic Synthesis of Random-Pattern-Testable Circuits
Previous approaches to designing random pattern testable circuits use post-synthesis test point insertion to eliminate random pattern resistant (r.p.r.) faults. The approach taken...
Nur A. Touba, Edward J. McCluskey
ICCAD
1997
IEEE
97views Hardware» more  ICCAD 1997»
13 years 11 months ago
Low power logic synthesis for XOR based circuits
An abundance of research e orts in low power logic synthesis have so far been focused on and or or nand nor based logic. A typical approach is to rst generate an initial multi-lev...
Unni Narayanan, C. L. Liu