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» Synthesis of quantum logic circuits
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ASPDAC
2010
ACM
161views Hardware» more  ASPDAC 2010»
13 years 7 months ago
Novel dual-Vth independent-gate FinFET circuits
This paper describes gate work function and oxide thickness tuning to realize novel circuits using dual-Vth independent-gate FinFETs. Dual-Vth FinFETs with independent gates enabl...
Masoud Rostami, Kartik Mohanram
TCAD
2008
97views more  TCAD 2008»
13 years 9 months ago
Encoding Large Asynchronous Controllers With ILP Techniques
State encoding is one of the most difficult problems in the synthesis of asynchronous controllers. This paper presents a method that can solve the problem of large controllers spec...
Josep Carmona, Jordi Cortadella
ICCAD
2007
IEEE
139views Hardware» more  ICCAD 2007»
14 years 4 months ago
Using functional independence conditions to optimize the performance of latency-insensitive systems
—In latency-insensitive design shell modules are used to encapsulate system components (pearls) in order to interface them with the given latency-insensitive protocol and dynamic...
Cheng-Hong Li, Luca P. Carloni
ICCAD
2002
IEEE
94views Hardware» more  ICCAD 2002»
14 years 6 months ago
High-level synthesis of distributed logic-memory architectures
Abstract— With the increasing cost of global communication onchip, high-performance designs for data-intensive applications require architectures that distribute hardware resourc...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
CHES
2005
Springer
82views Cryptology» more  CHES 2005»
14 years 3 months ago
Masking at Gate Level in the Presence of Glitches
Abstract. It has recently been shown that logic circuits in the implementation of cryptographic algorithms, although protected by “secure” random masking schemes, leak side-cha...
Wieland Fischer, Berndt M. Gammel